System on Chip (SoC) have multiple power domains which operate below the rail voltages and draw very less amount of current. The advancement in VLSI technology has led to direct increase in demand for SoC. As a result of this comprehensive research has been carried out in the field of DC–DC converter to meet the requirements of dynamic voltage frequency scaling. A fully on-chip switched capacitor based adaptive DC–DC converter is presented in this paper. The DC–DC converter has been implemented to down convert a 1.2 V supply to 0.8, 0.6 and 0.4 V. Major focus of this paper is to maximize the efficiency using multi gain switching circuits with pulse frequency modulation. High switching speed (fast transient response) is with reduction in the overlap error of the non-overlapping clocks and high fly capacitor density. Post layout simulation results in 90 nm CMOS technology show efficiency in the range of 84–90 % was achieved for G = 1:3–2:3 at load current of 500 µA. Maximum switching transient response of 19 ns was achieved for transition from 0.6 to 0.8 V. © 2016, Springer Science+Business Media New York.