Folded Cascode (FC) Low Noise Amplifier (LNA) is preferred for low voltage and low power RF applications. A FC LNA with gm-boosting technique is reported in the literature. Under low voltage operation, linearity of the LNAs is degraded due to transconductance and drain conductance nonlinearities. To improve the linearity of the LNAs, several techniques namely Harmonic Termination Network, Derivative Superposition, Modified Derivative Superposition (MDS) techniques are reported in the literature. In this paper to achieve high linearity for the gm-boosting FC LNA, MDS technique is incorporated at the Common Source (CS) stage and is proposed. In order to evaluate the efficacy of this approach, the proposed LNA is designed and implemented in UMC 0.18 µm MMRF CMOS process for 2.44 GHz. From the simulation results, it is found that the proposed LNA achieves a gain (S21) of 14.6 dB, Noise Figure (NF) of 2.9 dB, Input matching (S11) of −15 dB and third order Input Intercept Point (IIP3) of +4.19 dBm. The power consumption of LNA is 3.8 mW for a supply voltage of 0.6 V. The proposed LNA has a higher Figure of Merit (FoM) than that of other Cascode LNAs reported in the literature. © 2016 Elsevier Ltd