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A low-power double balanced oscillator mixer design in 90nm CMOS technology
N. Satish Reddy,
Published in Asian Research Publishing Network
Volume: 9
Issue: 12
Pages: 2479 - 2485
CMOS Scaling technologies are the main caused for great impact on Analog design. The most severe affect is the reduction in the voltage supply. A double balanced down conversion oscillator mixer using 90 nm CMOS technology is proposed in this work. This oscillator mixer consists of an individual mixer stacked on a voltage-controlled oscillator (VCO). The proposed stacked structure allows entire mixer current to be reused by the VCO cross-coupled pair to reduce the total current consumption of the individual VCO and mixer. Using individual supply voltages and eliminating the tail current source, the stacked topology requires low supply voltage. The DC power consumed by the oscillator is 1.7 mW and mixer is 0.2 mW. The power consumed by discrete structures is high when compared to the proposed stacked structure. At 4.2 GHz a voltage gain of 39 dB and an IIP3 is -12.4 dBm are measured at a supply voltage of 0.9V and with a power consumption of only 1.9 mW. © 2006-2014 Asian Research Publishing Network (ARPN).
About the journal
JournalARPN Journal of Engineering and Applied Sciences
PublisherAsian Research Publishing Network