This paper proposes a new spatial domain watermarking of grayscale images and has also shown its VLSI Implementation without altering its content in real time using a secret key. The secret key is generated by searching the watermark pixel values in host image content and the location maps are marked in secret key. Therefore this algorithm is called PVSA- Pixel Value Search Algorithm. The proposed algorithm does not make any change in the host image. Thus it shows high robustness to signal processing attacks. The watermark extraction process is simple as the host content is extracted based on key. We have evaluated the robustness of the algorithm against several signal processing attacks using MATLAB. Finally we have implemented the same algorithm in verilog HDL using Altera Quartus-II. © 2015 IEEE.

Sakthivel S M

Electronics

School of Electronics Engineering

Chennai Campus

Ravi Sankar A

Vellore Institute of Technology (VIT) is a private university located in&nbsp;Tamil Nadu, India. Founded in 1984, as Vellore Engineering College, the institution offers 20 undergraduate, 34 postgraduate, four integrated and four research programs. It has campuses in Vellore, Amravati, Bhopal and Chennai.

VIT is one of the top ranked private universities in India according to NIRF, THE and QS Rankings.&nbsp;Govt. of India has recognized&nbsp;VIT, Vellore as an&nbsp;Institution of Eminence. This has allowed VIT to take independent quality initiatives and move up in world ranking.

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VIT University

A real time watermarking of grayscale images without altering it's content

2015 International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA)

Digital image watermarking has become more popular due to its applications in copyright protection and secret communication. Most of the image watermarking algorithms reported till date involve modification of the host contents for embedding a secret data, leading to a reduced robustness and a limited embedding capacity. In the present work, a novel spatial domain watermarking scheme called Pixel Value Search Algorithm (PVSA) is proposed using a linear search operation to achieve high robustness and a theoretically unlimited embedding capacity. In the proposed scheme, secret data are embedded into a host image by mapping their intensity values into row and column locations. Due to this linear mapping of secret data, the host structural content is not altered. In addition, multiple watermarks can be mapped into a single host image using the PVSA technique. The proposed algorithm is verified using MATLAB® simulations and its performance characteristics are assessed using a standard benchmark tool called strimark. Experimental results illustrate the robustness of the PVSA technique against the attacks of Gaussian blurring, Gaussian noise, salt and pepper noise, Poisson noise, speckle noise, mean and median filtering, histogram equalization, image sharpening, intensity transformation, unsharp filtering, JPEG attack, etc. Subsequently an ASIC implementation of the PVSA algorithm is carried out using Verilog HDL and various modules of the Cadence® EDA tool so as to integrate the chip as a watermark co-processor. The ASIC implementation using a 0.18 μm technology at an operating frequency of 100 MHz consumes a power of 326.34 μW for the complete hardware architecture. © 2018, Springer Science+Business Media, LLC, part of Springer Nature.

Multimedia Tools and Applications

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2017 25th European Signal Processing Conference (EUSIPCO)

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Authentication of secret information in image Steganography

Journal	Data powered by Typeset2015 International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA)
Publisher	Data powered by TypesetIEEE
Open Access	No