Natarajan Prabaharan

Subramani Saravanan

Amalorpavaraj Rini Ann Jerin

Kaliannan Palanisamy

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A Reduced Switch Asymmetric Multilevel Inverter Topology Using Unipolar Pulse Width Modulation Strategies for Photovoltaic Application

Recent Developments on Power Inverters

International Journal of Engineering & Technology

Symmetrical and asymmetrical cascaded multilevel inverter for photovoltaic system

This article introduces a new reduced switch multilevel inverter topology that operates in asymmetric state. The advantage of proposed multilevel inverter is utilizing the lower device count when compared to traditional configuration. This paper depicts a hybrid pulse width modulation which includes three different carriers and unipolar references. The three different carriers are saw-tooth, triangular, inverted unipolar sine which is arranged in phase disposition technique. The effectiveness of proposed hybrid pulse width modulation (HPWM) technique is tested with a new reduced switch topology using MATLAB/Simulink. The different parameters are calculated with various modulation indices. © Springer Nature Singapore Pte Ltd. 2018.

Lecture Notes in Electrical Engineering Advances in Electronics, Communication and Computing

A New Pulse Width Modulation Technique with Hybrid Carrier Arrangement for Multilevel Inverter Topology

A 31 LEVEL Asymmetrical Cascaded H-Bridge Multilevel inverter (ASCHBMLI) with DC-DC Fly back converter with single DC source for photovoltaic system using Maximum Power Point Tracking system. In this paper the photovoltaic (PV) system is given input to the primary side of DC-DC converter, where as the secondary side of the converter consists of 'n' no of turns with different output voltage. In Maximum Power Point Tracking (MPPT) system, the Perturb and Observe (P&amp;O) technique is used for controlling the switch in DC-DC FBC. The topology is based on a cascaded connection of single phase sub multilevel converter unit and full bridge Cascaded H Bridge Inverter. The Input DC voltage source of Vdc1,Vdc2,Vdc3 &amp; Vdc4 are designed in binary form of voltage of 15Vdc1,30Vdc2,60Vdc3 &amp;120Vdc4 respectively. The output voltage levels are 2∗(1+2+4+8) +1=31) 31 level .The low frequency Pulse Width Modulation Technique is used for controlling the Power semiconductor Switches in the ASCHBMLI. © 2017 IEEE.

2017 International Conference on High Voltage Engineering and Power Systems (ICHVEPS)

A 31-level asymmetrical cascaded multilevel inverter with DC-DC flyback converter for photovoltaic system

2017 Innovations in Power and Advanced Computing Technologies (i-PACT)

Performance evaluation of a nine level cascaded multilevel inverter with single DC source for photovoltaic system

A quasi-linear Cascaded H-Bridge multilevel inverter is introduced for solar application. In this paper, a separate solar panel with boost converter is placed instead of DC sources in the proposed configuration. The Incremental and Conductance maximum power point algorithm method is implemented for tracking maximum power with a fast response. Sinusoidal reference with triangular carriers is utilized in pulse width modulation for generating the switching pulses for proposed inverter. The proposed inverter can generate a 19-level output voltage with total harmonic distortion of 6.10% which is simulated using MATLAB/Simulink. Cost analysis of power switches is discussed. © 2016 The Authors.

Energy Procedia

Modeling and Analysis of a Quasi-linear Multilevel Inverter for Photovoltaic Application

This paper introduces a new single phase hybrid multilevel inverter with a minimum number of switches for a Photovoltaic application. A Perturb and observe maximum power point tracking is used for tracking maximum power from solar panel. A boost converter is used for boosting the generated voltage because proposed inverter operates at the asymmetric condition. The proposed inverter is the combination of reduced switch topology and cascaded H-Bridge topology. Two types of Phase Disposition carrier arrangement with sinusoidal reference is utilized for generating the gating pulses for proposed inverter. It generates a 15-level output voltage with 8.12% of total harmonic distortion. © 2016 The Authors.

A Single Phase Grid Connected Hybrid Multilevel Inverter for Interfacing Photo-voltaic System

Multilevel inverters (MLIs) are gaining familiarity in industries for high-voltage applications. This study is a comparison of symmetric and asymmetric reduced switch MLI topologies which require a lesser number of switches for generating the desired number of voltage levels. In both symmetric and asymmetric conditions, output voltage levels are generated using the same number of switches with different DC source magnitudes. Unipolar pulse width modulation strategy is adapted in these topologies to generate the switching pulses. Three different unipolar references (sine, trapezoidal, 60°) and three different carrier arrangements (phase disposition, alternative phase opposition and disposition and variable frequency) are taken and each reference is compared with three different carrier signals. The performance parameters such as total harmonic distortion (THD), crest factor and distortion factor are evaluated for different modulation indices and compared with both conditions. The proposed topology in symmetric and asymmetric conditions can generate 9-level and 31-level output voltages, respectively, which are simulated using MATLAB/Simulink and verified with the experimental setup. The calculation of%THD using analytical asymptotic formula is also carried out. The theoretical value of%THD is verified to match closely with the simulation and experimental results. © The Institution of Engineering and Technology 2016.

IET Power Electronics

Comparative analysis of symmetric and asymmetric reduced switch MLI topologies using unipolar pulse width modulation strategies

This paper proposes a single phase multilevel inverter configuration that conjoins three series connected full bridge inverter and a single half bridge inverter for renewable energy application especially photo-voltaic system. This configuration of multilevel inverter reduces the value of total harmonic distortion. The half bridge inverter utilized in the proposed configuration increases the output voltage level to nearly twice the output voltage level of a conventional cascaded H-bridge multilevel inverter. This higher output voltage level is generated with lesser number of power semiconductor switches compared to conventional configuration, thus reducing the total harmonic distortion and switching losses. The effectiveness of the proposed configuration is illustrated by replacing the isolated DC sources in multilevel inverter with individual photo-voltaic panels using separate perturb and observer based maximum power point tracking and boost converters. The verification of the proposed system is demonstrated successfully using MATLAB/Simulink based simulation with different irradiation and temperature conditions. Also, the transient operation of the system is verified with results depicted using step change in standard test condition. In the proposed system, total harmonic distortion of the output voltage is 9.85% without using passive filters and 3.91% with filter inductance. Theoretical calculation of the power losses and total harmonic distortion with mathematical equations are discussed. Selective experimental results are presented to prove the effectiveness of proposed system. © 2016 Elsevier Ltd

Energy Conversion and Management

Analysis and integration of multilevel inverter configuration with boost converters in a photovoltaic system

Research of multilevel inverter (MLI) has always been a noteworthy inspiration to increasing number of levels with decreasing total harmonic distortion (THD). Various topologies of symmetric dc source and asymmetric dc source multilevel inverter have been developed. In this paper, a new asymmetric dc source hybrid multilevel inverter topology with minimized switch count is proposed. It is possible to extent any number of levels. Multicarrier pulse width modulation techniques are adopted for triggering the gate pulses. The operation of the proposed topology is explained with 15-level output voltage. In that, phase disposition (PD) technique has 8.03% of THD when compared to the carrier overlapping (CO) technique. The simulation results are carried out by using MATLAB/Simulink with different modulation index. © 2015 IEEE.

Journal	Recent Developments on Power Inverters
Publisher	InTech
Open Access	Yes