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A Review On Dynamic Comparator Topologies
Naikar P.H,
Published in IEEE
Presently, comparators have become indispensible in the design of Analog to Digital Converter (ADC) blocks. This work focuses on analyzing, comparing the different works reported on dynamic comparator design from conventional to contemporary needs. This work also advocates the best comparators suitable for different applications based on different parameters. The circuit design with appropriate mathematical design for different comparators was carried out in detail highlighting their pros and cons. Simulation of the reviewed circuits was carried out using gpdk 90nm technology in Cadence environment. The proposed design shows better efficiency as it's delay has been improved by at least 55% as compared to the other designs. © 2019 IEEE.
About the journal
JournalData powered by Typeset2019 International Conference on Vision Towards Emerging Trends in Communication and Networking (ViTECoN)
PublisherData powered by TypesetIEEE
Open Access0