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Algorithms for reducing reconfiguration overheads using prefetch, reuse, and optimal mapping of tasks
, M. Kannan
Published in John Wiley and Sons Ltd
Volume: 33
Issue: 7
Field Programmable Gate Arrays (FPGAs) are preferred in the modern embedded system to accelerate the performance of the entire system. However, the FPGAs are liable to suffer from reconfiguration overheads. These overheads are mainly because of the configuration data being fetched from the off-chip memory at run-time and due to the improper management of tasks during execution. To reduce these overheads, two algorithms are proposed. Both the algorithms focus on the prefetch heuristics, reuse technique, and an optimal mapping of tasks over the available memories. However, in terms of reusing technique, algorithm-1 uses least recently used (LRU) policy and algorithm-2 uses the optimal replacement policy (considering the vitality of the reconfigurable units (RUs)). Simulation results are obtained for both the algorithms. It is evident from the result that most of the reconfiguration overheads are eliminated when the applications are managed and executed based on the proposed algorithms. Also, the two algorithm results are compared and analyzed. For this purpose, the experiments included smaller and larger task graphs. In the case of smaller task graphs, algorithm-2 outperforms algorithm-1 in reducing reconfiguration overheads. In larger task graphs, algorithm-1 produces better results compared to algorithm-2. © 2018 John Wiley & Sons, Ltd.
About the journal
JournalData powered by TypesetConcurrency Computation
PublisherData powered by TypesetJohn Wiley and Sons Ltd