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An FPGA based implementation of SIFT algorithm
T. Kavya,
Published in Blue Eyes Intelligence Engineering and Sciences Publication
2019
Volume: 8
   
Issue: 4
Pages: 1193 - 1198
Abstract
Feature extraction is a significant processing step in any machine learning application. The significant features of the image will be extracted to represent different groups for processing. Hence it must be accurately extracted and it should act as a representative for the complete dataset. Feature extraction plays a major role in facilitating the subsequent learning and generalization steps. Scale Invariant Feature Transform (SIFT) is widely used in a variety of applications like surveillance, object recognition, panoramic view generation etc. The SIFT algorithm has a main advantage of its scale and orientation invariance. The steps in SIFT algorithm incurs complex calculations and hence high power for processing. These steps can be parallelized which permits better performance in algorithm execution. This research presents an attempt for parallel implementation of SIFT algorithm in FPGA. © 2019, Blue Eyes Intelligence Engineering & Sciences Publication. All rights reserved.
About the journal
JournalInternational Journal of Engineering and Advanced Technology
PublisherBlue Eyes Intelligence Engineering and Sciences Publication
ISSN22498958