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Analysis and Simulation of Schottky Tunneling Using Schottky Barrier FET with 2-D Analytical Modeling
, A. Vinod, K. Dharavath, B. Bhowmick
Published in Springer Science and Business Media B.V.
A novel analytical model of surface potential for a double metal gate schottky barrier tunnelling (SBT) FET using schottky tunnelling with HfO2 as gate dielectric is proposed. The presence of a schottky tunnelling at source-channel interface improves the drain current because of the advanced tunneling from one band-to- another band charge carriers in the area of the interface junctions. Moreover, the existence of the duel work-function- improved the conductivity and thus enhances the tunnelling probability, which increases device performance. The surface potential along the channel the model is examined using the two-dimensional (2-D) Poisson equation with suitable boundary conditions and shows a major part in the design of the shortest distance between source/channel and the drain-source current. Due to its high tunnelling increases on-state current, expressively reduced off-sate current, the proposed device represents one of the reliable model to substitute complementary metal-oxide-semiconductor (CMOS) technology. The results of the analytical model are confirmed against those attained using the silvaco device simulator. © 2021, Springer Nature B.V.
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