In the recent years, reversible logic has emerged as a viable approach in power optimization and also has found its importance in low power CMOS, quantum computing, nanotechnology, and optical computing. The main challenge in reversible circuits is to optimize the quantum cost, time delay and the garbage outputs associated with the reversible circuit. 'RevKit' in recent years has become a popular and powerful tool for design visualization, implementation and analysis in reversible computing. In this work, we have implemented the design of reversible 4-bit and 8-bit barrel shifter circuits in RevKit and results are analyzed in terms of quantum cost, delay, garbage outputs, gate count, line count and transistor cost. Further, the simulation results have been documented and tabulated to facilitate a comparative study with conventional designs. ©2006-2015 Asian Research Publishing Network (ARPN).