Multilevel inverters (MLIs) are gaining familiarity in industries for high-voltage applications. This study is a comparison of symmetric and asymmetric reduced switch MLI topologies which require a lesser number of switches for generating the desired number of voltage levels. In both symmetric and asymmetric conditions, output voltage levels are generated using the same number of switches with different DC source magnitudes. Unipolar pulse width modulation strategy is adapted in these topologies to generate the switching pulses. Three different unipolar references (sine, trapezoidal, 60°) and three different carrier arrangements (phase disposition, alternative phase opposition and disposition and variable frequency) are taken and each reference is compared with three different carrier signals. The performance parameters such as total harmonic distortion (THD), crest factor and distortion factor are evaluated for different modulation indices and compared with both conditions. The proposed topology in symmetric and asymmetric conditions can generate 9-level and 31-level output voltages, respectively, which are simulated using MATLAB/Simulink and verified with the experimental setup. The calculation of%THD using analytical asymptotic formula is also carried out. The theoretical value of%THD is verified to match closely with the simulation and experimental results. © The Institution of Engineering and Technology 2016.