Miniaturization in the geometry of CMOS technology improves IC performance but beyond certain limit, scaling of CMOS may be quite challenging due to various short channel effects. To overcome such issues double gate (DG) CMOS or FinFET are used because of its ability to minimize short channel effects. This paper presents the designing of frequency synthesizer using phase locked loop (PLL) based on FinFET technology. Here we have used shorted gate FinFET for designing the circuits. A frequency synthesizer capable of synthesizing an input clock frequency of 500 MHz to an output frequency of 1 GHz is implemented using FinFET with a lock in time of 254 ns. The circuits are implemented on Cadence ®Virtuoso using 32nm FinFET technology and 1V power supply. © 2015 IEEE.