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Design of low phase noise voltage controlled oscillator for phase locked loop
M Vineeth Bhat, Siddanth Jain, M. P. Srivatsa, M. Nithin,
Published in IEEE
Volume: 2017-January
Pages: 1 - 4
The design and analysis of a fully differential LC tank based voltage controlled oscillator is discussed in this paper. The oscillator is negative gm based and the CMOS cross-coupled pair used in the design provides the negative resistance to sustain the oscillations. The tuning range is about 43% with 2.4GHz as the center frequency. The phase noise at an offset of 1MHz is 135.6dBc/Hz. The design consumes 6.17mW power from a supply voltage of 3.3V. The supply sensitivity of the design is 2.5% for ±5% variation in the supply voltage. © 2017 IEEE.
About the journal
JournalData powered by Typeset2017 International conference on Microelectronic Devices, Circuits and Systems (ICMDCS)
PublisherData powered by TypesetIEEE
Open AccessNo