In this paper we have implemented edge detection on a Real Time Image Capture. The video is captured via the Terasic 5MP camera and then interfaced with FPGA kit and the edge detected image is shown in VGA display. In addition, Canny Edge Detection algorithm is used to obtain the edge detected version of the RGB image captured by the interfaced camera. This algorithm provides low error rate as compared to the other edge detection algorithm. Our inspiration emerged from our enthusiasm towards machine vision and dynamics. © 2015 IEEE.

Sivanantham S

Department of Micro and Nanoelectronics

School of Electronics Engineering

Vellore Campus

Sivasankaran K

Jeyakumar R

Prakash M

Vellore Institute of Technology (VIT) is a private university located in&nbsp;Tamil Nadu, India. Founded in 1984, as Vellore Engineering College, the institution offers 20 undergraduate, 34 postgraduate, four integrated and four research programs. It has campuses in Vellore, Amravati, Bhopal and Chennai.

VIT is one of the top ranked private universities in India according to NIRF, THE and QS Rankings.&nbsp;Govt. of India has recognized&nbsp;VIT, Vellore as an&nbsp;Institution of Eminence. This has allowed VIT to take independent quality initiatives and move up in world ranking.

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VIT University

FPGA implementation of edge detection using Canny algorithm

2015 Online International Conference on Green Engineering and Technologies (IC-GET)

Object tracking is the cornerstone for all machine vision applications. The major challenge in object tracking applications has always been speed, accuracy and ability to process heavy data flow. By using field programmable gate arrays in implementing the algorithm, we can overcome the challenges primarily by using its ability of reconfigurable design and parallel architecture. The basic building blocks of this project are pre-processing, image splitting and detection followed by tracking and display. The pre-processing block uses scaling of image through bilinear interpolation so as to make it more applicable for computation, the image splitting and detection block do the splitting of image after compression, which is achieved by breaking the image into submatrices. Through consistent comparison and analysis of the stream of images with a default image, the object is tracked. © 2016 Pushpa Publishing House, Allahabad, India.

Far East Journal of Electronics and Communications

OBJECT TRACKING ALGORITHM IMPLEMENTATION FOR SECURITY APPLICATIONS

IEEE Transactions on Image Processing

A Distributed Canny Edge Detector: Algorithm and FPGA Implementation

International Journal of Computer Applications

PS2-VGA Peripheral based Character Display using FPGA

2012 International Conference on Computer Science and Electronics Engineering

An Improved Adaptive Threshold Canny Edge Detection Algorithm

Benezit Dictionary of Artists

Qian Xu

Journal	Data powered by Typeset2015 Online International Conference on Green Engineering and Technologies (IC-GET)
Publisher	Data powered by TypesetIEEE
Open Access	0