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FPGA implementation of universal asynchronous transmitter and receiver
More J, Suryavanshi R, Dasarwar G, ,
Published in IEEE
2015
Abstract
The proposed work in this paper describes the implementation of universal asynchronous transmitter and receiver, that is UART. The UART is a type of a serial communication protocol which serves the purpose of full duplex communication over a serial link. The UART here in is described by hardware description language that is Verilog HDL. The Verilog HDL code has been simulated in the ModelSim 10.1d and implemented on Altera DE1 board. © 2015 IEEE.
About the journal
JournalData powered by Typeset2015 Online International Conference on Green Engineering and Technologies (IC-GET)
PublisherData powered by TypesetIEEE
Open Access0