Scaling of metal–oxide–semiconductor field-effect transistors (MOSFETs) to below a few tens of nanometer has failed to make significant improvements. FinFETs were introduced to replace MOS devices in circuits, offering good performance improvement in the nanoscale regime. Memories occupy a major portion of chip area. Their reliability is a primary concern in harsh environments such as cosmic radiation. Also, in the nanoscale regime, reliability proves to be challenging. We present herein FinFET- and junctionless FinFET-based 6T-static random-access memories (SRAMs) for the 16-nm technology node. In the literature so far, either drain or gate strike has been considered. In this work, we studied irradiation in both the drain and the gate region. The FinFET-based 6T-SRAM showed higher hardness to single-event upset (SEU) radiation in both regions compared to junctionless FinFET-based 6T-SRAM. © 2017, Springer Science+Business Media New York.

Ramakrishnan V-N

Department of Micro and Nanoelectronics

School of Electronics Engineering

Vellore Campus

Nilamani S

Vellore Institute of Technology (VIT) is a private university located in&nbsp;Tamil Nadu, India. Founded in 1984, as Vellore Engineering College, the institution offers 20 undergraduate, 34 postgraduate, four integrated and four research programs. It has campuses in Vellore, Amravati, Bhopal and Chennai.

VIT is one of the top ranked private universities in India according to NIRF, THE and QS Rankings.&nbsp;Govt. of India has recognized&nbsp;VIT, Vellore as an&nbsp;Institution of Eminence. This has allowed VIT to take independent quality initiatives and move up in world ranking.

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VIT University

Journal of Computational Electronics

Introduction of new conduction mechanism called junctionless in MOSFETs takes us to another direction in device fabrication. Moving from inversion to junctionless devices in nanoscale regime proves a good alternative for low-power applications and overcomes the barrier of lightly doped channels. 6T-SRAM circuits, the first to arrive in the market long ago, still occupy its area in modern-day ICs too. In this work, four topologies of 6T-SRAM namely Flex-Vth, Flex-PG, PG-SN, and FinFETs are generated based on inversion type independent double-gate as well as common double-gate devices. For the first time, the same four topologies are also generated using junctionless devices. In nanoscale range, the reliability of circuits is given paramount importance since they are easily affected by radiation. This 6T-SRAM's radiation sensitivity is studied and from our simulation results, the common double-gate based 6T-SRAM shows good performance over the independent double-gate based 6T-SRAM in both inversion and junctionless type. © 2018 Elsevier Ltd

Microelectronics Reliability

Topological variation on sub-20 nm double-gate inversion and Junctionless-FinFET based 6T-SRAM circuits and its SEU radiation performance

3D TCAD Simulation for CMOS Nanoeletronic Devices

Introduction of Synopsys Sentaurus TCAD Simulation

2017 Fifth Berkeley Symposium on Energy Efficient Electronic Systems & Steep Transistors Workshop (E3S)

“Roadmap evolution: From NTRS to ITRS, from ITRS 2.0 to IRDS

Predictive evaluation of electrical characteristics of sub-22nm FinFET technologies under device geometry variations

Effect of underlap and soft error performance in 30 nm FinFET-based 6T-SRAM cells with simultaneous and independent driven gates

IEEE Transactions on Nuclear Science

Radiation Effects in Advanced Multiple Gate and Silicon-on-Insulator Transistors

Gate and drain SEU sensitivity of sub-20-nm FinFET- and Junctionless FinFET-based 6T-SRAM circuits by 3D TCAD simulation

Journal	Data powered by TypesetJournal of Computational Electronics
Publisher	Data powered by TypesetSpringer Science and Business Media LLC
ISSN	1569-8025
Open Access	No