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High Performance Energy Efficient Grid Based Routing Algorithm for Multi Network on Chip
, J.S. Sadiq
Published in Institute of Electrical and Electronics Engineers Inc.
2019
Abstract
Network on chip has been discussed since it is smart structure and high performance. If using a high completion of on-chip communication method is called the Destination Tag. The destination Tag technique has been recently applied to Noc. The aim of this paper is to describe the technique is called the particle swarm optimization algorithm, to find the optimal solution for shortest paths. We propose PSO, To implement and optimized the traffic regulation unit at various algorithms of multiprocessor Noc. We can enhance the performance and network utilization. To enhance the efficiency of routing algorithm PSO is optimized. A Multi-NOC design with particle swarm optimization algorithms for various subnets, and Integrated, to avoid overcrowding power gating and packet scheduling policy. Using PSO we focused low power, scalable architecture. By using this method, the performance improvement at varying network utilization is achieved. It preserves extra energy is develops at long duration in grid system. The proposed router coded in VHDL and the simulation results is experimental shown by using the tool Xilinx. © 2019 IEEE.