The need for fast data processing and reducing the power dissipation of digital signal processing(DSP) algorithms and Cryptographic algorithms have provoked the development of efficient hardware implementations of residue number system (RNS) and logarithmic number system(LNS) arithmetic. This paper describes the implementation of adder and subtractor units by using RNS and LNS arithmetic. Addition and subtraction units are major and basic operations in public key cryptographic algorithms like Elliptic Curve Cryptography (ECC). In cryptography the use of finite fields plays a major role which is time consuming, there is a need for fast and efficient implementations. © 2016 IEEE.