Junctionless inserted oxide FinFET (JL-iFinFET) is presented, its performance metrics are quantified and compared with JL-FinFET and JL-Stacked-Nanowire-FET (JL-SNWFET) respectively for the same foot-print on the wafer. The Random-Dopant-Fluctuation (RDF) and Metal-Gate-Granularity (MGG) are major variability sources in nano-transistors. Impedance Field Method is used to analyze the statistical variability performance of all three structures caused by RDF and MGG. The result shows JL-SNWFET provides superior DC figure-of-merits and 40% less statistical variability than JL-FinFET with a 10% increase in delay and considerable increase in fabrication complexity. The JL-iFinFET offers 30% lesser process-induced threshold voltage and on-current variations compare to JL-FinFET, without deteriorating delay and RF metrics due to its superior electrostatic control over the channel and multi-channel configuration. Fabrication of JL-iFinFET is also possible without adding much complexity in FinFET process it can be a major contender for continued scaling with JL-Transistors (JLTs). © 2019 Elsevier GmbH