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Integrating wearable low power CMOS ECG acquisition SoC with decision making system for WSBN applications
M. Pandiyan, , J. Jerome, S. Natarajan
Published in IEEE Computer Society
Volume: 2015-October
Pages: 154 - 158
The paper aims to present an ultra-low power electrocardiogram (ECG) on chip with integrated fuzzy decision making (FDM) chip for body sensor networks. The proposed device is small in size, wearable, battery life. The proposed device has two designed chips: (1) ECG on Chip and 2) FDM chip. The ECG on chip contains an analog front end circuits, a 12-bit SAR ADC, a QRS detector and relevant control circuitry interfaces. The analog front end circuits accurately senses and digitizes the raw ECG signal, which is then filtered to extract the QRS complex with sampling frequency of 256 Hz. The obtained ECG details are sent to FDM chip for decision making where abnormalities are found and an alert signal is sent to the patient via microcontroller. The patient's ECG data is wirelessly transmitted to mobile phone or PC using ZigBee. The chip was designed and implemented in 0.35μm standard CMOS process. The digital circuits and SRAM operate at 3.3V. The total area of the device is about 6cm2 and consumes about 8.5μW. Small size and low power consumption show the effectiveness of the proposed design suitable for wireless wearable ECG monitoring devices. © 2015 IEEE.
About the journal
JournalData powered by TypesetIEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC
PublisherData powered by TypesetIEEE Computer Society