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Investigation of DC characteristic on DG-Tunnel FET with high-K dielectric using distinct device parameterPublished in Institute of Electrical and Electronics Engineers Inc.
2017
Pages: 124 - 128
In this work, systematic investigation of DGTFET have been made by varying different device parameter such as dielectric constant, doping concentration, work function, temperature, and channel length with their variation impact on threshold voltage (Vth). It is also analyzed that while decreasing the value of work function, energy band overlap increases, whichcauses decrease in tunneling width. Hence leads to highsource channel tunneling. DC characteristics of theproposed device like ON current, OFF current and Vth arealso examined with different device parameter engineering. TCAD device simulator was used as a 2D simulator for the optimization result of DG-TFET. © 2016 IEEE.
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About the journal
| Journal | Data powered by TypesetProceedings - 2016 IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2016 |
|---|---|
| Publisher | Data powered by TypesetInstitute of Electrical and Electronics Engineers Inc. |
Authors (1)
Vikas Vijayvargiya- Dataline isolated differential current feed/mode sense amplifier for small Icell SRAM using FinFET
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