This paper compares the performance of adiabatic inverter circuits employing homo/hetero-junction-based double-gate tunnel field-effect transistors (DG-TFETs). The static and dynamic adiabatic inverter circuits are constructed and they are operated by a sinusoidal power clock signal. The static adiabatic inverter circuits quasi-static energy recovery logic (QSERL), complimentary energy path recovery logic (CEPAL), glitch-free cascadable adiabatic logic (GFCAL) and dynamic adiabatic inverter circuits, clocked adiabatic logic (CAL), pass-transistor adiabatic logic (PAL), single-phase source coupled adiabatic logic (SCAL) are taken into consideration. The circuit performances are evaluated in terms of their power dissipation and delay. In static adiabatic inverter circuits, the homo/hetero-TFET-based GFCAL circuit shows better performance in terms of power and delay than QSERL and CEPAL. In dynamic adiabatic inverter circuits, the homo/hetero-TFET-based PAL circuit demonstrates better improvement in terms of power and delay than CAL and SCAL. © 2020 IETE.