Balasubramanian V

Department of Information Security

School of Computer Science and Engineering

Vellore Campus

John J.

Vellore Institute of Technology (VIT) is a private university located in&nbsp;Tamil Nadu, India. Founded in 1984, as Vellore Engineering College, the institution offers 20 undergraduate, 34 postgraduate, four integrated and four research programs. It has campuses in Vellore, Amravati, Bhopal and Chennai.

VIT is one of the top ranked private universities in India according to NIRF, THE and QS Rankings.&nbsp;Govt. of India has recognized&nbsp;VIT, Vellore as an&nbsp;Institution of Eminence. This has allowed VIT to take independent quality initiatives and move up in world ranking.

&nbsp;

&nbsp;

VIT University

International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.

Vedic mathematics is an old mathematics which is more effective than other mathematic procedures. Vedic maths is utilized as a part of numerous applications, for example, hypothesis of numbers, compound duplications, squaring, cubing, square root and solid shape root and so on. Absolutely there are 16 sutras and 14 sub-sutras in Vedic maths. Among those sutras, just 3 sutras and 2 sub-sutras are utilized for augmentation. Multiplier is a very important part of a microprocessor as multiplication is performed continuously in all calculative procedures. This paper is in importance of a 8-bit multiplier designed in 90 nm technology. Urdhva-Tiryakbyham is the sutra that is used for multiplication in Vedic mathematics. Actualizing the different scientific operations utilizing Vedic Mathematics causes us accomplish better speed, bring down unpredictability and higher execution.[2] The technique used is Gate Diffusion Input (GDI) which is a more refined way to design a circuit which less complex than circuits designed by other techniques.

Fulltext

International Journal of Engineering & Technology

Design and Analysis of 8-bit Vedic Multiplier in 90nm Technology using GDI Technique

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Asynchronous gate-diffusion-input (GDI) circuits

Gate-diffusion input (GDI): a power-efficient method for digital combinatorial circuits

Virtual Components Design and Reuse

Evaluation of Technology and the Medea Design Automation Roadmap

Design automation with the TSPC circuit technique: a high-performance wave digital filter

Low power digital design using modified GDI method

Journal	Data powered by TypesetInternational Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.
Publisher	Data powered by TypesetIEEE
Open Access	0