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Low Power Implantable Spike Sorting Scheme Based on Neuromorphic Classifier with Supervised Training Engine
R. Pathak, , A.K. Mukhopadhyay, A. Basu, M. Sharad
Published in IEEE Computer Society
Volume: 2017-July
Pages: 266 - 271
An ultra-low power neural spike sorting technique for implantable, multi-channel neural implant is proposed. It involves spiking neural network (SNN) with binary weights as an energy and area efficient classifier, along with a suitable frontend for spike encoding of the recorded neuro-potential. The proposed scheme employs two step training to implement supervised learning for the classifier, in order to achieve appreciable classification accuracy, along with low power dissipation. During the 1st phase a k-mean clustering module is trained with the real-time input data. In the 2nd phase, the trained means are used to perform supervised learning for the SNN classifier. After the training process, the low power SNN module is used for the classification task. In the proposed scheme, the K-means training module can be shared among large number of channels for training the dedicated SNN modules, which are relatively compact and can operate with ±4x lower power (as compared to the K-means sorter), while preserving the classification accuracy. Algorithm and architecture level optimizations for the proposed system are presented. © 2017 IEEE.
About the journal
JournalData powered by TypesetProceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
PublisherData powered by TypesetIEEE Computer Society