Multistage interconnection networks are employed in data centres to interchange information between the processors and memory elements. Data Vortex (DV) is a multistage minimum logic network which can be used in data centres. DV satisfies the requirements of the interconnection networks such as scalability and throughput. However, the latency is on higher side, and reduction in latency can lead to higher throughput. In the present paper, we describe the feasibility and performance analysis of DV architecture in reverse direction. The routing and the possible hardware model of the node switch have been discussed. We present the performance analysis of Reverse Data Vortex (RDV) architecture in terms of throughput, latency and latency distribution. A comparative study with DV on throughput, latency and latency distribution is also presented. The simulation result shows that the decrease in latency of RDV is about 50 % that of DV and this leads to an increase in injection rate of RDV to values more than two times that of DV. © 2013 Springer Science+Business Media New York.