This paper presents an asymmetrical multilevel inverter topology, which employs reduced power electronic devices to produce 13 levels at the output voltage. This reduction in the components results in the curtailment of the size, cost, switching and conduction losses. A comparative study of the proposed topology with the recent ones is presented. Nearest level control (NLC) is utilized for the generation of gating pulses. A reliability analysis is performed using Markov reliability calculation, and the efficiency of the overall system is improved. Simulation and experimental results are provided for resistive and inductive loads. © Springer Nature Singapore Pte Ltd 2020.