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Performance of viola-Jones algorithm using Matlab and FPGA for hardware acceleration
A. Bramhekar, H. Panwal,
Published in IAEME Publication
Volume: 11
Issue: 3
Pages: 238 - 247
Face Detection is a process of finding whether there are faces present in an image. This process needs large amount of information processing and thus, results in poor performance when performed on general purpose CPU. The main objective of this paper is implement a hardware based face detection system on Field Programmable Gate Array (FPGA) using VHDL. Also, the goal is to carry a comparative analysis of Viola-Jones face detection algorithm being implemented on Altera DE2-115 FPGA board and MATLAB simulation tool on the basis of processing time and cost. © IAEME Publication
About the journal
JournalInternational Journal of Electrical Engineering and Technology
PublisherIAEME Publication