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Performance verification of symmetric hybridized cascaded multilevel inverter with reduced number of switches
Published in IEEE
2017
Volume: 2017-January
   
Pages: 1 - 5
Abstract
This paper presents the 11 level and 17-level symmetric hybridized cascaded Multilevel Inverter with less number of switches in comparison to the conventional topology. Each H-bridge generates a five-level output voltage to which two dc sources are connected as supply. In order to obtain level more than basic five levels either symmetric configuration is to be designed with basic hybrid h-bridge topology. Operation of basic topology can divided as two phase, in one phase the basic levels +V1, 0, - V1 are produced by connection of bidirectional switch to the second leg on H-bridge and in other phase the peak levels +2V1, 0, -2V1 are produced as normal H-bridge operation using two legs. The SHCMLI consists of a number of sub inverter levels. The simulation is done on MATLAB/SIMULINK and the harmonic analysis of an 11 level and 17level inverter is presented. The simplified topology results in cutting down the installation costs and area. © 2017 IEEE.
About the journal
JournalData powered by Typeset2017 Innovations in Power and Advanced Computing Technologies (i-PACT)
PublisherData powered by TypesetIEEE
Open AccessNo