Hardware implementation of Shunt Active Power Filter (SAPF) to regulate harmonics in the grid current is presented in this work. Dead-beat controller is employed to regulate the harmonics injected by SAPF using Spartan-6 FPGA processor. The effectiveness of the control strategy is tested under different operating conditions through MATLAB simulations and experimental approach to reduce the grid current harmonics and to meet the IEEE519:2014 recommendations for harmonic regulation guidelines, at the Point-of-Common-Coupling(PCC). © 2019 Wydawnictwo SIGMA-NOT. All rights reserved.