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Study of approximate compressors for multiplication using FPGA
Mody J, Lawand R, ,
Published in IEEE
2015
Abstract
Multiplication is an integral part of most of the signal processing applications. Most of the multipliers require large space, consume more power and are the main source of delay in computer arithmetic. Approximate multiplication is extensively used in applications such as multimedia and image processing, which require higher speed and can tolerate some error and imprecision. We are studying accurate compressor and two approximate compressors for Dadda multiplier. We are comparing the hardware complexity of designs, critical path delay, and error rate and power consumption for the three designs. © 2015 IEEE.
About the journal
JournalData powered by Typeset2015 Online International Conference on Green Engineering and Technologies (IC-GET)
PublisherData powered by TypesetIEEE
Open Access0