Operation of conventional inverters like cascaded Multilevel Inverter (MLI), diode clamped multilevel inverter and flying capacitor multilevel inverter are easily performed with the various pulse width modulation techniques. The conventional MLIs are not obtaining the good efficiency due to more switching losses. To attain good efficiency with less switching losses and less Total Harmonic Distortion (THD) without changing the performance of MLIs, Reduced Switch Multilevel Inverters (RSMLI) are proposed by many researchers. But, the switching operation of RSMLI is not similar to conventional MLIs which is major task. Operation of individual switch is achieved with the help logic gates. Obtaining the logical equation for each switch with four proposed RSMLIs are analyzed and presented in this work. To obtain the pulse pattern for each switch, Multi Carrier SPWM (MCSPWM) and Multi Carrier Unipolar SPWM (MCUPSPWM) methods are used. Binary representation of PWM methods helps the researcher to analyze the switching sequence and pulse pattern of various RSMLIs with different levels of output voltage. Three 7 level and one 9 level RSMLIs are analyzed and simulated. %THD comparison is presented for proposed RSMLIs with the various PWM methods by different modulation index values. © IJSTR 2019.