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TSPC Based Dynamic Linear Feedback Shift Register
Published in Springer India
2016
Volume: 372
   
Pages: 655 - 662
Abstract
A Low power-Linear Feedback Shift register (LP-LFSR) with encoding technique is proposed. The LP-LFSR is a low power pseudo random sequence generator, designed using the True Single Phase Clock (TSPC) and gray encoding technique. It offers very high speed even while working with low power, less area and reduced clock-skew problems. Validation of the proposed design is made through comparison with a True Single Phase Clock (TSPC) based LFSR. The deployment of the LP-LFSR for testing application generates the random pattern with a single bit variation, thus leading to reduction in switching power. © Springer India 2016.
About the journal
JournalData powered by TypesetLecture Notes in Electrical Engineering Microelectronics, Electromagnetics and Telecommunications
PublisherData powered by TypesetSpringer India
ISSN1876-1100
Open AccessNo