In this paper, a novel, high-performance and robust sense amplifier (SA) design is presented for small ICELLl SRAM, using fin-shaped field effect transistors (FinFET) in 22-nm technology. The technique offers data-line-isolated current sensing approach. Compared with the conventional CSA (CCSA) and hybrid SA (HSA), the proposed current feed-SA (CF-SA) demonstrates 2.15× and 3.02× higher differential current, respectively, for VDD of 0.6 V. Our results indicate that even at the worst corner, CF-SA can provide 2.23× and 1.7× higher data-line differential voltage compared with CCSA and HSA, respectively. Further, 66.89 and 31.47 % reductions in the cell access time are achieved compared to the CCSA and HSA, respectively, under similar ICELLl and bit-line and data-line capacitance. Statistical simulations have proved that the CF-SA provides high read yield with 32.39 and 22.24 % less σ Delay. It also offers a much better read effectiveness and robustness against the data-line capacitance as well as VDD variation. Furthermore, the CF-SA is able to tolerate a large offset of the input devices, up to 80 mV at VDD= 0.6 V. © 2015, Springer Science+Business Media New York.