V S Kanchana Bhaaskaran
Professor - Higher Academic Grade
+91-9791179275 (Work)
Publications - 89Publications - 89
Publications - 89Publications (89)
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Book Chapter4-Bit Vedic Multiplier Design Using Gate-Diffusion Input (GDI) Logic2021 | Springer Science and Business Media Deutschland GmbH
ArticlesSpeed enhancement techniques for Clock-Delayed Dual Keeper Domino logic style2020 | Taylor and Francis Ltd.
Journal ArticleAnalysis of FinFET-Based Adiabatic Circuits for the Design of Arithmetic Structures2020 | World Scientific Pub Co Pte Lt
Journal ArticleDesign of Manchester Carry Chain Adder using High speed Domino Logic2019 | IOP Publishing
Open Access
Journal ArticleHardware footprints of S-box in lightweight symmetric block ciphers for IoT and CPS information security systems2019 | Elsevier BV- ArticlesA review on the design of lightweight symmetric block ciphers for cyber physical systems2019 | Blue Eyes Intelligence Engineering and Sciences Publication
ConferencesDesign and analysis of FinFET based CSCPAL low power adder2019 | Institute of Electrical and Electronics Engineers Inc.- Journal ArticleDesign and analysis of IPAL for ultra low power CRC architecture for applications in IoT based systems2019 | Elsevier BV
- Journal ArticleDesign of FinFET-based Energy Efficient Pass-Transistor Adiabatic Logic for ultra-low power applications2019 | Elsevier BV
- Journal ArticleDesign impacts of delay invariant high-speed clock delayed dual keeper domino circuit2019 | Institution of Engineering and Technology (IET)
- ConferencesPerformance Analysis of Adder Architecture using Modified Pass transistor Adiabatic Logic Circuits2019 | Institute of Electrical and Electronics Engineers Inc.
- Journal ArticleDesign of Low Power VLSI Circuits Using Two Phase Adiabatic Dynamic Logic (2PADL)2018 | World Scientific Pub Co Pte Lt
- Journal ArticleLightweight S-Box Architecture for Secure Internet of Things2018 | MDPI AGOpen Access
Journal ArticleDesign and Analysis of Clocked CMOS Differential Adiabatic Logic (CCDAL) for Low Power2018 | American Scientific Publishers- Book ChapterA Novel Adiabatic Logic for Low Power VLSI Circuit Design and Power Optimization Using FinFET2018 | Springer Singapore
- Journal ArticleHigh Speed and Low Power Implementation of AES for Wireless Sensor Networks2018 | Elsevier BVOpen Access
- Book ChapterDifferential Power Analysis (DPA) Resistant Cryptographic S-Box2018 | Springer Singapore
