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89 Publications
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V S Kanchana Bhaaskaran
Professor - Higher Academic Grade
Electronics
kanchana.vs@vit.ac.in (Work)
vskanchana@ieee.org (Work)
vskanchana@gmail.com (Work)
+91-9791179275 (Work)
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Publications - 89
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Publications (89)
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Publications (89)
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Conferences
Implementation of convolutional encoder and Viterbi decoder using Verilog HDL
V. Kavinilavu
,
S. Salivahanan
,
V S Kanchana Bhaaskaran
,
...
,
C. Vinoth
(6 authors)
2011
Conferences
16-Bit RISC processor design for convolution application
S. Sakthikumaran
,
S. Salivahanan
and
V S Kanchana Bhaaskaran
2011
Conferences
Energy recovery performance of quasi-adiabatic circuits using lower technology nodes
V S Kanchana Bhaaskaran
2011
Conferences
A novel low power and high speed Wallace tree multiplier for RISC processor
C. Vinoth
,
V S Kanchana Bhaaskaran
,
...
,
B. Sharath
(8 authors)
2011
Journal Article
TWO-PHASE SINUSOIDAL POWER-CLOCKED QUASI-ADIABATIC LOGIC CIRCUITS
Raina J.P.
and
V S Kanchana Bhaaskaran
2010 | World Scientific Pub Co Pte Lt
Conferences
Asymmetrical Positive Feedback Adiabatic Logic for low power and higher frequency
V S Kanchana Bhaaskaran
2010
Journal Article
Differential Cascode Adiabatic Logic Structure for Low Power
Raina J.P.
and
V S Kanchana Bhaaskaran
2008 | American Scientific Publishers
Proceedings Article
Semi-custom design of adiabatic adder circuits
Salivahanan S
,
Emmanuel D.S.
and
V S Kanchana Bhaaskaran
2006 | IEEE
Book Chapter
Low Power VLSI Circuit Design using Energy Recovery Techniques
V S Kanchana Bhaaskaran
| IGI Global
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