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9 Publications
9 Journals
Sasipriya P
Associate Professor Grade 2
Electrical
sasipriya.p@vit.ac.in (Work)
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Publications - 9
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Publications (9)
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Publications (9)
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Conferences
Design of Low Power Multipliers Using Approximate Compressors
V. Gundavarapu
,
M. Balaji
and
Sasipriya P
2021 | Springer Science and Business Media Deutschland GmbH
Conferences
Low power SRAM using adiabatic logic
C. Anudeep Varma
and
Sasipriya P
2021 | IOP Publishing Ltd
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Journal Article
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Low power combinational and sequential logic circuits using clocked differential cascode adiabatic logic (CDCAL)
Sasipriya P
and
Bhaaskaran V.S.K.
2018 | Science Publishing Corporation
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Journal Article
Design of Low Power VLSI Circuits Using Two Phase Adiabatic Dynamic Logic (2PADL)
Sasipriya P
and
V S Kanchana Bhaaskaran
2018 | World Scientific Pub Co Pte Lt
Journal Article
Design and Analysis of Clocked CMOS Differential Adiabatic Logic (CCDAL) for Low Power
Sasipriya P
and
V S Kanchana Bhaaskaran
2018 | American Scientific Publishers
Proceedings Article
Clock distribution network design for single phase energy recovery circuits
Nunna yamini
,
Sasipriya P
and
V S Kanchana Bhaaskaran
2017 | IEEE
Journal Article
A Low Power Multiplier using a 24-Transistor Latch Adder
Gomes S.V
,
Sasipriya P
and
V S Kanchana Bhaaskaran
2015 | Indian Society for Education and Environment
Proceedings Article
Two phase sinusoidal power clocked quasi-static adiabatic logic families
Sasipriya P
and
V S Kanchana Bhaaskaran
2015 | IEEE
Proceedings Article
Single phase clocked quasi static adiabatic tree adder
Sasipriya P
and
V S Kanchana Bhaaskaran
2012 | IEEE
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