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Sri Adibhatla Sridevi
Associate Professor Grade 2
Department of Micro and Nanoelectronics
sridevi@vit.ac.in (Work)
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Publications - 37
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Publications (37)
Network (3)
Publications (37)
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Book Chapter
ASIC Implementation of Linear Periodically Time Varying Filter by Thread Decomposition
Sri Adibhatla Sridevi
and
R. Dhuli
2021 | Springer Science and Business Media Deutschland GmbH
Articles
Dual bit control low-power dynamic content addressable memory design for IoT applications
Satti V.V.S.
and
Sri Adibhatla Sridevi
2021 | Turkiye Klinikleri
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Journal Article
High speed low area OBC DA based decimation filter for hearing aids application
NagaJyothi G
and
Sri Adibhatla Sridevi
2020 | Springer Science and Business Media LLC
Articles
Design and analysis of an arithmetic and logic unit using single electron transistor
Aarthy M
and
Sri Adibhatla Sridevi
2020 | Science and Information Organization
Articles
Design of successive approximation (Sa) based low complexity multiplier-less coefficient decimation filter bank for sdr receivers
K. Baboji
and
Sri Adibhatla Sridevi
2020 | Research Trend
Journal Article
A Low Power Flash ADC using Single-Electron Transistor
Aarthy M
and
Sri Adibhatla Sridevi
2019 | Blue Eyes Intelligence Engineering and Sciences Engineering and Sciences Publication - BEIESP
Book Chapter
ASIC Implementation of Low Power, Area Efficient Adaptive FIR Filter Using Pipelined DA
Naga Jyothi G
and
Sri Adibhatla Sridevi
2019 | Springer Singapore
Articles
Hybrid self-controlled precharge-free CAM design for low power and high performance
Satti V.V.S.
and
Sri Adibhatla Sridevi
2019 | Turkiye Klinikleri
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PDF
Publisher Copy
Articles
Design of TCAM architecture for low power and high performance applications
Veera Venkata Satyanarayana S.
and
Sri Adibhatla Sridevi
2019 | Gazi Universitesi
Journal Article
Dual-chirality GAA-CNTFET-based SCPF-TCAM cell design for low power and high performance
Satyanarayana S.V.V
,
Shailendra S.R
,
Ramakrishnan V-N
and
Sri Adibhatla Sridevi
2019 | Springer Science and Business Media LLC
Articles
Optimal Design of Multiplier-Less Non-uniform Channel Filters with Successive Approximation of Vectors
K. Baboji
and
Sri Adibhatla Sridevi
2019 | Birkhauser Boston
Articles
High speed and low area decision feed-back equalizer with novel memory less distributed arithmetic filter
G. NagaJyothi
and
Sri Adibhatla Sridevi
2019 | Springer
Articles
Pre-charge free soft error hardened cam cell design for low power and high performance
Satyanarayana S.V.V.
and
Sri Adibhatla Sridevi
2019 | Taylor's University
Articles
Design and analysis of an ultra-l ow power single electron transistor based binary multiplier
Aarthy M
and
Sri Adibhatla Sridevi
2019 | Institute of Advanced Scientific Research, Inc.
Book Chapter
Efficient Precharge-Free CAM Match-Line Architecture Design for Low Power
Satyanarayana S.V.V
and
Sri Adibhatla Sridevi
2019 | Springer Singapore
Articles
Design and implementation of area and power efficient reconfigurable FIR filter with low complexity coefficients
Killadi B.
and
Sri Adibhatla Sridevi
2019 | Gazi Universitesi
Journal Article
Low Power, Low Area Adaptive Finite Impulse Response Filter Based on Memory Less Distributed Arithmetic
Jyothi G.N
and
Sri Adibhatla Sridevi
2018 | American Scientific Publishers
Proceedings Article
High Speed FinFET Traff Comparator Based Function Generator
Kundu D
,
Guin S
,
...
,
Sri Adibhatla Sridevi
(4 authors)
2018 | IEEE
Proceedings Article
A Low Voltage 100 DB Three-Stage Opamp with Self Bias Technique for Bio Medical Applications.
Nagulapalli S.R
,
Sri Adibhatla Sridevi
and
Bharath A.S.
2018 | IEEE
Proceedings Article
A Linearity Enhancement Technique for Cascode Opamp in 65nm CMOS Technology
Nagulapalli R
,
Sri Adibhatla Sridevi
,
...
,
Bharath A.S.
(4 authors)
2018 | IEEE
Showing 1-20 of 37 results
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