A modified recycling folded cascode (MRFC) operational transconductance amplifier (OTA) for achieving high DC gain, slew rate, and unity gain bandwidth (UGB) is proposed in this paper. Positive feedback is adopted to enhance DC gain and unity gain bandwidth. The proposed MRFC OTA is compared with conventional folded cascode (FC), recycling folded cascode (RFC), and other OTAs existing in the literature. Three OTAs, FC, RFC, and MRFC, are realized and implemented using the UMC 180 nm CMOS process for the same bias current of 300 µA. The designs are simulated in the Cadence Spectre Environment. From the simulation results, it may be noted that the proposed amplifier achieves a gain of 76.24 dB and unity gain bandwidth of 74.7 MHz with an input referred noise and slew rate of 139.2 µVrms and 64.05 V/ µs respectively. The proposed amplifier occupies an area of 2760 µm2 © TÜBİTAK.

Kumaravel S

Department of Micro and Nanoelectronics

School of Electronics Engineering

Vellore Campus

Venishetty S.R

Fulltext

Vellore Institute of Technology (VIT) is a private university located in&nbsp;Tamil Nadu, India. Founded in 1984, as Vellore Engineering College, the institution offers 20 undergraduate, 34 postgraduate, four integrated and four research programs. It has campuses in Vellore, Amravati, Bhopal and Chennai.

VIT is one of the top ranked private universities in India according to NIRF, THE and QS Rankings.&nbsp;Govt. of India has recognized&nbsp;VIT, Vellore as an&nbsp;Institution of Eminence. This has allowed VIT to take independent quality initiatives and move up in world ranking.

&nbsp;

&nbsp;

VIT University

Modified recycling folded cascode OTA with enhancement in transconductanceand output impedance

TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES

This paper briefs the design and analysis of recycling folded cascode amplifier using potential distribution method (PDM). Recycling folded cascode amplifier exhibits improved performance in terms of gain, unity gain frequency, slew rate compared to the conventional folded cascode amplifier. While designing of gain boosting amplifier architectures employing cascode structures, designers often found it difficult to keep all the transistors in saturation to meet the desired circuit performance. Potential distribution method provides a design technique based on node voltage distribution for analog circuit designers, which guarantees that all the transistors are operated in saturation. PDM is independent of process technology, device dimensions and complex design equations governing the performance of individual devices and circuit. The designing of recycling folded cascode amplifier using PDM is carried out in UMC 180nm CMOS technology and simulation results were presented. A gain of 62.35 dB with a unity gain frequency of 53.5 MHz at a bandwidth of 42.1 kHz, when driving a load capacitance of 1pF is obtained. Also provides a phase margin of 73.4 o at a power dissipation of 180 μW. © 2017 IEEE.

2017 International conference on Microelectronic Devices, Circuits and Systems (ICMDCS)

Design of recycling folded cascode amplifier using potential distribution method

Microsystem Technologies

Design of a power efficient, high slew rate and gain boosted improved recycling folded cascode amplifier with adaptive biasing technique

Microelectronics Journal

Ultra-low power OTA based on bias recycling and subthreshold operation with phase margin enhancement

Electrical and Electronics Engineering: An International Journal

Enhancing Phase-Margin of OTA Using Self-Biasing Cascode Current Mirror

AEU - International Journal of Electronics and Communications

Design and analysis of DC gain and transconductance boosted recycling folded cascode OTA

Journal	TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES
Publisher	The Scientific and Technological Research Council of Turkey
ISSN	13000632
Open Access	Yes