In this letter, we present a new method to reduce crosstalk of carbon nanotube (CNT)-based VLSI interconnects. For this, proper integration of semiconducting CNTs (s-CNTs) and a new contact geometry, where metallic CNTs are in the core and s-CNTs are in the periphery of the CNT bundle, is proposed. The coupling capacitance between adjacent interconnects is modeled and compared with and without s-CNTs in the CNT bundle periphery. SPICE analysis and EM simulations are carried out which show that the coupling capacitance can be reduced by 82.5% and the resulting delay by 8.41%. We suggest that the crosstalk effect between neighboring wires can be reduced by using s-CNTs in the design.

Uma Sathyakam P

Department of Instrumentation

School of Electrical Engineering

Vellore Campus

Partha Sharathi Mallick

Vellore Institute of Technology (VIT) is a private university located in&nbsp;Tamil Nadu, India. Founded in 1984, as Vellore Engineering College, the institution offers 20 undergraduate, 34 postgraduate, four integrated and four research programs. It has campuses in Vellore, Amravati, Bhopal and Chennai.

VIT is one of the top ranked private universities in India according to NIRF, THE and QS Rankings.&nbsp;Govt. of India has recognized&nbsp;VIT, Vellore as an&nbsp;Institution of Eminence. This has allowed VIT to take independent quality initiatives and move up in world ranking.

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VIT University

Role of Semiconducting Carbon Nanotubes in Crosstalk Reduction of CNT Interconnects

IEEE Transactions on Nanotechnology

Triangular carbon nanotube (T-CNT) bundles are proposed as long interconnects for subthreshold VLSI circuits. The performance of subthreshold interconnects depends on the intrinsic quantum and electrostatic coupling capacitances of the interconnects. Proposed T-CNT bundles have the most optimum geometry that give least possible coupling capacitance between adjacent wires in an IC. First, we describe the T-CNT bundle models and of traditionally used square/rectangular CNT bundles for comparison. The subthreshold output current of an inverter is modelled, and hence, we find the optimum transistor widths for nFET and pFET that drives the subthreshold interconnects. This is carried out by the current-over-capacitance ratio approach, where the subthreshold current and the transistor output capacitance are considered. Then, we model the interconnects using equivalent single conductor models and find their propagation delay and power dissipated. The performance factors such as crosstalk-induced delay, power delay product and victim noise levels of capacitive coupled interconnects of T-CNT bundles are compared to traditionally used square/rectangular CNT bundles for lengths ranging from 500&nbsp;μm to 2000&nbsp;μm. We find that T-CNT bundles outperform square/rectangular CNT bundles.

Fulltext

Journal of Electronic Materials

Triangular Carbon Nanotube Bundle Interconnects for Subthreshold VLSI Circuits

Sub-threshold voltage operated circuits are the future for ultra-low-power applications. These circuits are inherently slow due to the very small sub-threshold currents. Here, the authors propose two approaches for improving the speed of SWCNT bundle interconnects driven by CNTFET-based circuits under sub-threshold conditions. First, the authors modulate the channel length of the CNTFETs that are used in the driver circuits to increase sub-threshold output current. The output current is maximum when the channel length is optimised to 15 nm. Second, the authors design driver circuits made of CNTFET-based inverters and transmission gates for SWCNT bundle interconnects at sub-threshold voltages. The authors consider five different configurations of the driver and load circuits. SPICE simulations show that transmission gates play a vital role in driver circuits by reducing the propagation delay and increasing the switching speed at high frequencies. Finally, the authors perform temperature-dependent analysis of the best cases from the proposed circuits and show that the propagation delay and power dissipated by them increases drastically at increased temperatures up to 500 K.

IET Circuits, Devices & Systems

High-speed sub-threshold operation of carbon nanotube interconnects

Current mode signaling (CMS) is found to be advantageous than voltage mode signaling (VMS) in VLSI interconnects. So, we propose the use of triangular carbon nanotube bundles as VLSI interconnects for CMS in VLSI circuits. T-CNT bundles have inherent advantages of lesser propagation delay and crosstalk delay than traditionally proposed square CNT bundle interconnects. We analyze the propagation delays of both the types of bundles in voltage and current mode signalling schemes and compare the improvement of propagation delay in both the cases. We find that T-CNT bundles perform better than square bundles in both the signalling schemes. © 2019 IEEE.

2019 Innovations in Power and Advanced Computing Technologies (i-PACT)

Analysis of triangular CNT bundle interconnects for current mode signalling

Carbon nanotube (CNT) interconnects are emerging as the ultimate choice for next generation ultra large scale integrated (ULSI) circuits. Significant progress in precise growth of aligned CNTs and integration of multiwalled CNT interconnects into a test chip make them promising candidates for future nanoelectronic chips. Tremendous research efforts were made on silicon based ultra-low-k dielectrics for Cu interconnects, but, the most recent advancements in polymer based composites as dielectric materials open up fresh challenges in the use of low-k dielectrics for CNT interconnects. This paper reviews the emerging polymer composites like Boron Nitride Nanotubes, Graphene/Polyimide composites, Metal Organic Frameworks and small diameter CNTs. Many reviews are already exists on the synthesis, fabrication, dielectric, mechanical, chemical and thermal properties of these materials. In this review, we have explained the specific properties of these materials and the necessities for integrating them into CNT interconnects to meet the requirements of future IC designers.Keywords: low-k dielectric materials, ultra low-k dielectrics, carbon nanotubes, interconnects, dielectric constant,

Journal of Nano Research

Future Dielectric Materials for CNT Interconnects - Possibilities and Challenges

Interconnects plays an important role in integrated circuits. Copper is used as an interconnect material, but beyond 22[Formula: see text]nm technology node it faces many problems due to grain boundary scattering, and therefore carbon nanotubes are the most promising future interconnect materials. Various techniques and approaches such as driver sizing, repeater sizing, repeater insertion, wire sizing, wire spacing, shielding, boos table repeater were used by various researchers. Many of these techniques can be utilized for future CNT based VLSI interconnects as well. This paper presents a detailed discussion on the techniques and approaches of past, present and future relevant for interconnects of VLSI circuits.

Journal of Circuits, Systems and Computers

Optimization Techniques for CNT Based VLSI Interconnects — A Review

This article presents a realistic inter-carbon nanotube (CNT) electrostatic coupling capacitance and tunnelling conductance model for a mixed CNT bundle. The change of potential across such a bundle necessitates the need to consider the inter-CNT capacitance in the equivalent circuit of CNT interconnects for very large scale integration circuits. The equivalent transmission line circuit model of a unit bundle containing one single-walled CNT (SWCNT) and one multi-walled CNT (MWCNT) has been shown. This new model is then used to calculate the delay induced by the inter-CNT capacitance and tunnelling conductance, which predicts the relative positioning of MW/SWCNTs in mixed CNT bundle.

International Journal of Electronics

Inter-CNT capacitance in mixed CNT bundle interconnects for VLSI circuits

Carbon nanotube based interconnect technology is becoming popular for its various merits over the current copper technology. The ability to conduct high current at high temperatures through the 1D structure is making the CNT interconnect technology an attractive one. Single wall and multi wall CNT interconnects have received greater interest initially when the mixed CNT bundles (MCBs) did not get much attention as VLSI interconnects. But, it was only in 2007 when the conductance study of mixed CNT bundles was done and since then many works have been reported. At this stage, it is essential to review the reports of MCB based interconnect technology. We present in this paper, the first review on MCB VLSI interconnects.

Journal	Data powered by TypesetIEEE Transactions on Nanotechnology
Publisher	Data powered by TypesetInstitute of Electrical and Electronics Engineers (IEEE)
ISSN	1536-125X
Open Access	0