In this paper, we propose transmission gates (TGs) as buffers/repeaters for carbon nanotube (CNT)-based VLSI interconnects. Various performance metrics of the TG buffer, viz. propagation delay, crosstalk-induced delay, power dissipation, and power-delay product under super-threshold and sub-threshold conditions are analysed. Performance analysis of TG buffers with CMOS inverter buffers at various interconnect lengths and buffer insertion intervals is done. We have also analysed the performance of Single-wall carbon nanotube (SWCNT) bundle and three different configurations of mixed CNT bundles. By comparing the power-delay product of both the buffers, it is found that TG buffers are more suitable for applications in CNT-based integrated circuits.

Partha Sharathi Mallick

Department of Instrumentation

School of Electrical Engineering

Vellore Campus

Fulltext

Vellore Institute of Technology (VIT) is a private university located in&nbsp;Tamil Nadu, India. Founded in 1984, as Vellore Engineering College, the institution offers 20 undergraduate, 34 postgraduate, four integrated and four research programs. It has campuses in Vellore, Amravati, Bhopal and Chennai.

VIT is one of the top ranked private universities in India according to NIRF, THE and QS Rankings.&nbsp;Govt. of India has recognized&nbsp;VIT, Vellore as an&nbsp;Institution of Eminence. This has allowed VIT to take independent quality initiatives and move up in world ranking.

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Transmission Gate as Buffer for Carbon-Nanotube-Based VLSI Interconnects

IETE Journal of Research

This paper proposes novel triangular cross-sectioned geometry of carbon nanotube (CNT) bundles for crosstalk and delay reduction in CNT bundle interconnects for VLSI circuits. First, we formulate the equivalent single conductor (ESC) transmission line models of the interconnects. Through SPICE analysis of the ESC circuits, we find the propagation delays of the proposed CNT bundles. Next, we model the capacitively coupled interconnects for crosstalk analysis. It is found that the coupling capacitance of triangular CNT bundle is 29% lesser than the traditionally used square CNT bundles. Further, the crosstalk-induced delay of triangular interconnects is found to be 30% lesser when compared to square bundle interconnects. The reduction in delay is found to increase as the number of CNTs in the bundle increases. So, we suggest that triangular CNT bundles are the most suitable candidates as global interconnects.

Journal of Circuits, Systems and Computers

Geometry-Based Crosstalk Reduction in CNT Interconnects

Current mode signaling (CMS) is found to be advantageous than voltage mode signaling (VMS) in VLSI interconnects. So, we propose the use of triangular carbon nanotube bundles as VLSI interconnects for CMS in VLSI circuits. T-CNT bundles have inherent advantages of lesser propagation delay and crosstalk delay than traditionally proposed square CNT bundle interconnects. We analyze the propagation delays of both the types of bundles in voltage and current mode signalling schemes and compare the improvement of propagation delay in both the cases. We find that T-CNT bundles perform better than square bundles in both the signalling schemes. © 2019 IEEE.

2019 Innovations in Power and Advanced Computing Technologies (i-PACT)

Analysis of triangular CNT bundle interconnects for current mode signalling

This paper proposes a body-biased bootstrapped CMOS driver for subthreshold applications. The proposed driver has been implemented with the same number of transistors as conventional bootstrapped CMOS driver. The performance of the subthreshold bootstrapped CMOS driver has been compared with the conventional bootstrapped CMOS driver. Our results show that the proposed body-biased subthreshold bootstrapped CMOS driver has 37% reduction in delay and 39% reduction in power dissipation compared to conventional bootstrapped CMOS driver. The proposed driver is more suitable to drive large loads compared to the conventional driver and operates better at subthreshold region.

Body-Biased Subthreshold Bootstrapped CMOS Driver

Scaling of integrated circuits leads to increase in design complexity of the transistors. Interconnect delay, Power dissipation and electromagnetic interferences arises due to increase in resistance and capacitance at the nanometer level. Sub threshold operation of devices for ultra-low power requirement necessitates the design issues of interconnects. Carbon nanotube (CNT) interconnects are the better alternative to copper interconnects, mainly due to the excellent properties of carbon nanotubes. CNTs have higher strength and excellent thermal and electrical properties. Current carrying capacity of CNT is nearly 10 6 times that of copper. CNT are basically classified as single walled CNTs and Multiwall CNTs. In this paper, analysis on SWCNT, DWCNT and Mixed CNT bundles as interconnects were done. The performances of mixed CNT bundles are better in delay compared to SWCNT bundles and DWCNT bundles.

2016 International Conference on Communication and Signal Processing (ICCSP)

Mixed CNT bundles as VLSI interconnects

Carbon nanotube based interconnect technology is becoming popular for its various merits over the current copper technology. The ability to conduct high current at high temperatures through the 1D structure is making the CNT interconnect technology an attractive one. Single wall and multi wall CNT interconnects have received greater interest initially when the mixed CNT bundles (MCBs) did not get much attention as VLSI interconnects. But, it was only in 2007 when the conductance study of mixed CNT bundles was done and since then many works have been reported. At this stage, it is essential to review the reports of MCB based interconnect technology. We present in this paper, the first review on MCB VLSI interconnects.

Nano Communication Networks

Towards realisation of mixed carbon nanotube bundles as VLSI interconnects: A review

Presented for the first time is an accurate modelling hierarchy for mixed CNT bundle interconnects. Single-walled CNTs and multi-walled CNTs have been modelled as equivalent single conductor transmission lines and then combined to form a mixed CNT bundle interconnect, which is basically a multiple equivalent single conductor model. Two multiple equivalent single conductor interconnects have been taken to form the multiconductor transmission line model. The delays from transient analysis for both models for a unit bundle have been compared with the corresponding ones for SWCNT bundles and MWCNTs that exist in the literature. It is found that mixed CNT bundle interconnects are superior to both SWCNT bundle and MWCNT interconnects in terms of delay.

Journal	IETE Journal of Research
Publisher	Informa UK Limited
ISSN	0377-2063
Open Access	0