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Kanike Vinod Kumar
Assistant Professor (Junior)
Department of Electrical Engineering
kanikevinodkumar@vit.ac.in (Work)
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Journal Article
Open Access
Analysis of Logic Gates for Generation of Switching Sequence in Symmetric and Asymmetric Reduced Switch Multilevel Inverter
Kanike Vinod Kumar
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Saravanakumar R
2019 | Institute of Electrical and Electronics Engineers (IEEE)
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Saravanakumar R
Professor Grade 2
Department of Control and Automation
1 publications in common
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