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15 Publications
11 Journals
Anita Angeline A
Assistant Professor (SG)
Electronics
anitaangeline.a@vit.ac.in (Work)
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Publications - 15
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Publications (15)
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Publications (15)
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Conferences
Design of energy efficient carry lookahead adder using novel CSIPGL adiabatic logic circuit
A.L. Bhalerao
,
A. Mane
,
...
,
Anita Angeline A
and
V.S. Kanchana Bhaaskaran
(6 authors)
2021 | IOP Publishing Ltd
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Postprint
Conferences
Design of arithmetic logic unit using pseudo dynamic buffer based domino logic
S.V. Kushal Kumar
and
Anita Angeline A
2021 | IOP Publishing Ltd
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PDF
Postprint
Journal Article
Open Access
Design of Manchester Carry Chain Adder using High speed Domino Logic
Das P
,
Bhalerao A.L
,
...
,
Anita Angeline A
and
V S Kanchana Bhaaskaran
(5 authors)
2019 | IOP Publishing
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PDF
Publisher Copy
Journal Article
High speed wide fan‐in designs using clock controlled dual keeper domino logic circuits
Anita Angeline A
and
V S Kanchana Bhaaskaran
2019 | Wiley
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PDF
Publisher Copy
Journal Article
Design impacts of delay invariant high-speed clock delayed dual keeper domino circuit
Anita Angeline A
and
V S Kanchana Bhaaskaran
2019 | Institution of Engineering and Technology (IET)
Book Chapter
High Performance Domino Logic Circuit Design by Contention Reduction
Anita Angeline A
and
V S Kanchana Bhaaskaran
2018 | Springer Singapore
Book Chapter
Design and Implementation of Multi-bit Self-checking Carry Select Adder
Shivkumar Kavitkar
and
Anita Angeline A
2018 | Springer Singapore
Proceedings Article
ALU design using Pseudo Dynamic Buffer based domino logic
Siva kumar akurati
,
Anita Angeline A
and
V S Kanchana Bhaaskaran
2017 | IEEE
Proceedings Article
Design of process variation tolerant domino logic keeper architecture
Shyamali padhi
,
Anita Angeline A
and
V S Kanchana Bhaaskaran
2017 | IEEE
Proceedings Article
Dual threshold HSCD domino adder structures
Vasant S.A
,
Anita Angeline A
and
V S Kanchana Bhaaskaran
2016 | IEEE
Book Chapter
TSPC Based Dynamic Linear Feedback Shift Register
Ambalal P.P
,
Anita Angeline A
and
V S Kanchana Bhaaskaran
2016 | Springer India
Journal Article
Open Access
Dynamic Logic ALU Design with Reduced Switching Power
Khaladkar Ramdas Bhanudas
,
RAMDAS BHANUDAS KHALADKAR
,
Anita Angeline A
and
V S Kanchana Bhaaskaran
2015 | Indian Society for Education and Environment
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Publisher Copy
Proceedings Article
Modified constant delay logic
Rao K.V
,
Anita Angeline A
and
V S Kanchana Bhaaskaran
2015 | IEEE
Journal Article
Design of a 16 Bit RISC Processor
Vishnuvardhan Rao K
,
MUGDHA FADNAVIS
,
Anita Angeline A
,
Augusta Sophy Beulet P
and
V S Kanchana Bhaaskaran
2015 | Indian Society for Education and Environment
Proceedings Article
Design and implementation of single precision pipelined floating point co-processor
Sangwan M
and
Anita Angeline A
2013 | IEEE
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