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55 Publications
41 Journals
Sakthivel R
Associate Professor Grade 2
Department of Micro and Nanoelectronics
rsakthivel@vit.ac.in (Work)
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Publications - 55
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Publications (55)
Network (6)
Publications (55)
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Proceedings Article
15–4 Approximate Compressor Based Multiplier for Image Processing
Swathi Krishna T.U
,
Riyas K.S
,
...
,
Sakthivel R
(4 authors)
2018 | IEEE
Proceedings Article
A Low Power 10 bit 50-MS/s Sample and Hold OTA Amplifier
Sakthivel R
,
Jyothi G.N
and
Dilip Kumar N.
2018 | ACM Press
Book Chapter
Design of Ultralow Voltage-Hybrid Full Adder Circuit Using GLBB Scheme for Energy-Efficient Arithmetic Applications
Sanapala K
,
Shree L.R
and
Sakthivel R
2018 | Springer Singapore
Articles
Low power custom circuit building using standard cells with reduced leakage by applying gate length biasing technique for high end computing applications
Sakthivel R
and
S. Kuppuswamy
2018 | Asian Research Publishing Network
Proceedings Article
Analysis of GDI logic for minimum energy optimal supply voltage
Kishore Sanapala
and
Sakthivel R
2017 | IEEE
Proceedings Article
Low power high performance carry select adder
Kerur S.S
,
Sakthivel R
,
...
,
Kittur Harish Mallikarjun
(4 authors)
2017 | IEEE
Journal Article
Design of a Capacitor-less Low Dropout Voltage Regulator
Sheenam Ahmed
,
Isha Baokar
and
Sakthivel R
2017 | Seventh Sense Research Group Journals
Proceedings Article
Low power XOR gate design and its applications
K ravali
,
Nagapurkar renuka vijay
,
...
,
Sakthivel R
(4 authors)
2017 | IEEE
Articles
Two novel subthreshold logic families for area and ultra low-energy efficient applications: DTGDI & SBBGDI
K. Sanapala
and
Sakthivel R
2017 | Gazi Universitesi
Proceedings Article
Design of high performance power efficient flip flops using transmission gates
Lakshman V.K.A
and
Sakthivel R
2016 | IEEE
Proceedings Article
A custom reconfigurable power efficient FIR filter
Sakthivel R
,
Mishra I
,
...
,
Wachaspati A.
(4 authors)
2016 | IEEE
Journal Article
Low Power Realization of Subthreshold Digital Logic Circuits using Body Bias Technique
Sanapala K
and
Sakthivel R
2016 | Indian Society for Education and Environment
Journal Article
VLSI Architecture for Image Contrast Enhancement using Modified Adaptive Gamma Correction with Weighting Distribution
Premson Y
and
Sakthivel R
2016 | Indian Society for Education and Environment
Articles
Residue number system based fir filter
Sakthivel R
and
M. Vanitha
2016 | International Journal of Pharmacy and Technology
Articles
VLSI implementation of lightweight cryptography algorithm
K. Hinpreet
and
Sakthivel R
2016 | International Institute for General Systems Studies
Articles
ASIC implementation of multiple constant multiplications operation of fir filter
Vanitha M
and
Sakthivel R
2016 | International Journal of Pharmacy and Technology
Journal Article
Low - Power and Area - Efficient Square – Root Carry Select Adders using Modified XOR Gate
Ragunath G
and
Sakthivel R
2016 | Indian Society for Education and Environment
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Articles
Data aware low power high throughput modified radix FFT processor for WPAN applications
Sakthivel R
and
Vanitha M
2016 | International Journal of Chemical Sciences
Articles
Design of full adder using subthreshold DTPT logic
K. Sanapala
and
Sakthivel R
2016 | International Institute for General Systems Studies
Articles
A power saving multiplication algorithm
Sakthivel R
and
Subha S
2016 | Research India Publications
Showing 21-40 of 55 results
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